Category
Engineering
Publish Date
Sunday 29-04-2018
Country
Egypt
Gender
any
Years Of Experience
3 - 5 Years
Salary
Negotiable
A reputable company located in Sheraton is hiring a Digital Implementation Engineer
Job Description:
- Develop and execute detailed block-level and chip-level digital designs.
- Write and verify RTL code (Verilog/VHDL) for digital sub-systems of system-on-a-chip (SOC).
- Synthesis of RTL code.
- Run static timing verification on the gate-level netlist with parasitics
- Writing test plans and test-bench development.
- Generation of required documentation and contribution to the validation and debugging of the fabricated silicon.
Qualifications:
- Sc. in Electronics Engineering.
- Excellent communications skills.
- Ability to work independently as well as a key team player.
- Oral and written fluency in English.
- 3-5 BS or MS in Electrical Engineering with background in CMOS ASIC/FPGA design
- Design and verification experience at the RTL and gate-level (Verilog/VHDL)
- Experience with synthesis tools
- Working knowledge of Cadence’s and Mentor IC design and verification tools on (NC–SIM, AMS-designer, ModelSim, etc).
- Knowledge of high speed and low power digital design techniques
- Strong documentation, communication, and presentation skills.
- Excellent problem solving and analytical skills.
- Should have experience with team building, process improvement, conflict resolution, and motivating people.
- Knowledge of P&R and DFT tools is a plus.
